A race condition in specific microprocessors using Intel (R) DDIO cache allocation and RDMA may allow an authenticated user to potentially enable partial information disclosure via adjacent access.
The product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently.
Link | Tags |
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https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00290.html | vendor advisory |
https://arxiv.org/abs/1909.04841 | third party advisory technical description |
https://support.f5.com/csp/article/K43220413 | third party advisory |
https://security.netapp.com/advisory/ntap-20190926-0001/ | third party advisory |
https://support.f5.com/csp/article/K43220413?utm_source=f5support&%3Butm_medium=RSS | |
https://ieeexplore.ieee.org/document/9152768 | third party advisory technical description |