Cortex-A77 cores (r0p0 and r1p0) are affected by erratum 1508412 where software, under certain circumstances, could deadlock a core due to the execution of either a load to device or non-cacheable memory, and either a store exclusive or register read of the Physical Address Register (PAR_EL1) in close proximity.
Workaround:
The product does not properly acquire or release a lock on a resource, leading to unexpected resource state changes and behaviors.
Link | Tags |
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https://xenbits.xenproject.org/xsa/advisory-436.html | third party advisory |